ESD5FN5.0
Specifications
Specifications
Marking Code
T
Case
0603
Circuit Figure
Fig.1
Peak Power Dissipation 8*20μsec PPPP(W)
200
Reverse Stand-Off Voltage VRWM(V)
5
Max Clamping Voltage VC (V) @ IPP
15.5
Off-State Capacitance 1MHz Zero dc Bias CO (PF)
120
Peak Pulse Current 8x20μsec IPP (A)
13
Reverse Leakage IR (μA) @ VRWM
2
