SESD15DP03
Specifications
Specifications
Marking Code
15P
Case
DFN1006
Circuit Figure
Fig.1
Peak Power Dissipation 8*20μsec PPPP(W)
320
Reverse Stand-Off Voltage VRWM(V)
15
Max Clamping Voltage VC (V) @ IPP
10
Off-State Capacitance 1MHz Zero dc Bias CO (PF)
50
Peak Pulse Current 8x20μsec IPP (A)
10
Reverse Leakage IR (μA) @ VRWM
0.2
