SESD033LCBD
Thông số kỹ thuật
Specifications
Marking Code
UM
Case
DFN1006
Circuit Figure
Fig.4
Peak Power Dissipation 8*20μsec PPPP(W)
100
Reverse Stand-Off Voltage VRWM(V)
3.3
Max Clamping Voltage VC (V) @ IPP
10
Off-State Capacitance 1MHz Zero dc Bias CO (PF)
3
Peak Pulse Current 8x20μsec IPP (A)
10
Reverse Leakage IR (μA) @ VRWM
1
