SESD0512BD
Thông số kỹ thuật
Specifications
Marking Code
25
Case
DFN1006
Circuit Figure
Fig.2
Peak Power Dissipation 8*20μsec PPPP(W)
200
Reverse Stand-Off Voltage VRWM(V)
12/5
Max Clamping Voltage VC (V) @ IPP
19/8
Off-State Capacitance 1MHz Zero dc Bias CO (PF)
30
Peak Pulse Current 8x20μsec IPP (A)
7/14
Reverse Leakage IR (μA) @ VRWM
1
