SESD24DCFBW
Thông số kỹ thuật
Specifications
Marking Code
DH
Case
DFN1006
Circuit Figure
Fig.2
Peak Power Dissipation 8*20μsec PPPP(W)
200
Reverse Stand-Off Voltage VRWM(V)
24
Max Clamping Voltage VC (V) @ IPP
55
Off-State Capacitance 1MHz Zero dc Bias CO (PF)
18
Peak Pulse Current 8x20μsec IPP (A)
3
Reverse Leakage IR (μA) @ VRWM
0.5
