SESD3.3DCFBW
Thông số kỹ thuật
Specifications
Marking Code
D3
Case
DFN1006
Circuit Figure
Fig.2
Peak Power Dissipation 8*20μsec PPPP(W)
200
Reverse Stand-Off Voltage VRWM(V)
3.3
Max Clamping Voltage VC (V) @ IPP
12
Off-State Capacitance 1MHz Zero dc Bias CO (PF)
19
Peak Pulse Current 8x20μsec IPP (A)
15
Reverse Leakage IR (μA) @ VRWM
0.5
